Unpatchable ‘Starbleed’ Bug in FPGA Chips Exposes Critical Devices to Hackers

fpga chip vulnerabilityfpga chip vulnerability

A newly discovered unpatchable hardware vulnerability in
Xilinx programmable logic products could allow an attacker to break
bitstream encryption, and clone intellectual property, change the
functionality, and even implant hardware Trojans.

The details of the attacks against Xilinx 7-Series and Virtex-6
Field Programmable Gate Arrays (FPGAs[1]) have been covered in a
paper titled “The Unpatchable
Silicon: A Full Break of the Bitstream Encryption of Xilinx
7-Series FPGAs
[2]” by a group of academics
from the Horst Goertz Institute for IT Security and Max Planck
Institute for Cyber Security and Privacy.

“We exploit a design flaw which piecewise leaks the decrypted
bitstream,” the researchers said. “In the attack, the FPGA is used
as a decryption oracle, while only access to a configuration
interface is needed. The attack does not require any sophisticated
tools and, depending on the target system, can potentially be
launched remotely.”

The findings will be presented at the USENIX Security Symposium
later this year. The researchers said they privately disclosed the
flaws to Xilinx on 24 September 2019. The semiconductor giant, in
response, has posted a design advisory
acknowledging the vulnerability.

“The complexity of this attack is similar to well known, and
proven, DPA attacks against these devices and therefore do not
weaken their security posture,” the company noted in its alert.

Exploiting CBC Mode to Encrypt and Decrypt Arbitrary
Blocks

FPGAs are programmable
integrated circuits
that can be reconfigured in-field to match
a desired application or functionality depending on where it’s
deployed. Due to their high levels of flexibility, FPGAs have been
widely used in the development of 5G mobile networks, consumer
electronics, data centers, aerospace, and automotive technology,

It’s worth noting that Xilinx and Intel (via its Altera
acquisition) dominate the FPGA market, with Xilinx alone accounting
for nearly 50% of the market
share
[5].

As FPGA designs are encoded in bitstreams, a hardware
vulnerability of this scale can have severe consequences, the
researchers said.

In contrast to other known side-channel[6]
and probing attacks against Xilinx and Altera FPGAs[7], the novel “low-cost”
attack aims to recover and manipulate the bitstream by leveraging
the configuration interface (such as SelectMAP or JTAG) to read
back data from the FPGA device.

As a feature, the “readback[8]” is meant to help verify
that the design was correctly downloaded to the device. But in an
attempt to protect the design, the bitstream is encrypted (AES-256
in CBC mode) to prevent readbacks on all external ports.

The attack devised by the researchers sets out to manipulate the
encrypted bitstream to redirect its decrypted configuration data to
a MultiBoot start
address register
[9]
(WBSTAR or Warm Boot Start Address), which allows switching between
images on-the-fly for remote updates and load a fallback bitstream
with a known good design into the FPGA device.

But given the use of flash memory to store these components, a
reset doesn’t clear the register’s contents. As a consequence, the
confidentiality of the bitstream can be broken as follows:

  1. Create a malicious bitstream and a readout bitstream. The
    malicious bitstream exploits the malleability[10] of the CBC encryption
    mode
    [11] to alter the command in
    the bitstream, which writes data to the WBSTAR configuration
    register.
  2. Load the malicious bitstream into the FPGA device
  3. An automatic reset of the FPGA happens due to changes made to
    the bitstream in step (1) but doesn’t reset the WBSTAR contents as
    it’s used for the MultiBoot and fallback feature.
  4. Readback the contents of the WBSTAR register using the readout
    bitstream.
  5. Manually reset the FPGA device to repeat the above steps and
    recover the entire encrypted bitstream as 32-bit words.

“In summary, the FPGA, if loaded with the encryption key, decrypts
the encrypted bitstream and writes it for the attacker to the
readable configuration register,” the researchers stated.

“Hence, the FPGA is used as a decryption oracle. The fact that
only single 32-bit words can be uncovered in each iteration
determines the duration of decrypting a whole bitstream: In our
experiments, we are able to uncover a complete Kintex-7 XC7K160T
bitstream in 3 hours and 42 minutes, for instance.”

In the second type of attack, the FPGA can be used to encrypt
arbitrary bitstreams — once again taking advantage of the
underlying CBC mode — and create a valid message authentication tag
(HMAC),
thereby breaking the authenticity of the bitstream as well.

According to the researchers, the attacks stem from a pitfall
that the data of the encrypted bitstream header is interpreted
before it’s been verified, thus allowing a malicious bitstream to
run on the FPGA’s logic fabric.

The Flaw Cannot Be Patched

Considering that the attacks are based on the flaws in the
protocol, the researchers noted that “any kind of non-trivial
change to the security protocol is not possible without a redesign
of the FPGA hardware and is currently not available for 7-Series
and Virtex-6 devices.”

In addition to recommending hardware developers to subject input
data to cryptographic validation and make use of a patchable
bitstream encryption engine — both of which are already in place
for Xilinx’s Zynq-7000, UltraScale, and UltraScale+ devices, a
number of countermeasures have been proposed, such as implementing
obfuscation schemes or patching the PCB to use FPGA’s Revision
Select pins to prevent readout from the WBSTAR register.

“We consider this as a severe attack, since (ironically) there
is no opportunity to patch the underlying silicon of the
cryptographic protocol,” the researchers concluded. “We note that
the 7-Series have a substantial share of the FPGA market, which
makes it even more difficult or impossible to replace these
devices.”

[3][4][12]

References

  1. ^
    FPGAs
    (www.xilinx.com)
  2. ^
    The Unpatchable Silicon: A Full Break
    of the Bitstream Encryption of Xilinx 7-Series FPGAs

    (www.usenix.org)
  3. ^
    design advisory
    (www.xilinx.com)
  4. ^
    programmable integrated circuits
    (www.allaboutcircuits.com)
  5. ^
    nearly 50% of the market share
    (hardwarebee.com)
  6. ^
    side-channel
    (eprint.iacr.org)
  7. ^
    Altera FPGAs
    (dl.acm.org)
  8. ^
    readback
    (www.xilinx.com)
  9. ^
    MultiBoot start address register
    (www.xilinx.com)
  10. ^
    malleability
    (en.wikipedia.org)
  11. ^
    CBC encryption mode
    (en.wikipedia.org)
  12. ^
    HMAC
    (en.wikipedia.org)

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